Display Engineer - Panel Design
Meta

Job Info

The Reality Labs (RL) Platform Display and Optics (D&O) team focuses on moving the state-of-art display and optics technologies forward for Meta products, which gives people the power to build community and bring the world closer together. The team is responsible for the technology development and maturation, component design, manufacturing process advancement, and test & integration of display and optics module for all RL productsAs a Display Panel Design Engineer, you will be a member of our Display and Optics organization, taking a lead in display panel architecture to set the technical goals, lead the development of leading-edge technologies and designs, and work with the current and evolving ecosystem to provide differentiating capabilities to our HW platforms. You will be part of a tight-knit group of highly talented engineers at the forefront of the innovation for MR/AR and Wrist products.

Display Engineer - Panel Design Responsibilities:

• Lead engineering activities on advanced display design for new display applications
• Work closely with cross functional teams and external display partners to develop the future display technologies and bring up design for new panel products
• Resolve design and flow issues related with circuit and pixel design, identify potential solutions and drive execution.
• Work closely with display IC, panel and module vendors throughout the design, sample, and engineering validation phases to address any design, production, and quality issues
• Partner with internal and external teams to develop uOLED displays based on silicon chips with specific process lines
• Design and optimize uOLED circuit and layout within small pixel/cell pitch
• Lead fab to develop uOLED display silicon process and transfer existing silicon technologies in and out of various process lines
• Design rule validation and optimization for uOLED display specifically silicon processes and devices
• Support failure analysis to improve defect rate, yield and process quality
• Willingness and ability to travel up to 25% time internationally

Minimum Qualifications:

• 5+ years of experience in the display industry
• Experience in panel architecture scoping and definition with various display technologies
• Experience in characterizing panel optical and electrical performance
• Experience in developing, designing and manufacturing high volume consumer product
• Effective communication skills

Preferred Qualifications:

• M.S degree in Electrical Engineering, Material Science or Engineering, Physics or related
• Hand on skill on Pixel and panel design, layout, parasitic parameter extraction and panel modeling
• Experience performing computer modeling and simulation with SPICE
• Experience in display pixel, gate driver designs
• Hands-on experience with transistor level design and verification of key analog blocks, including ADC/DAC, PLL, LDO, temperature sensor, OPAMP
• Experience with Cadence design environment and mixed-mode verification
• Experience in CIS and low-noise analog design
• High voltage or mixed-voltage analog IC design is a plus
• Experience with block level and chip level analog layout
• Expertise on analog layout platforms such as Cadence or Mentor and full set of layout verification tools including LVD/DRC checking tools
• Knowledge of RC delay, IR drop, coupling capacitance, electromigration, ESD and latch up
• Knowledge of one or more of the following technologies: Bipolar, CMOS, Depletion MOS, CMOS Image Sensor (CIS), Non-Volatile Memory (NVM), High voltage CMOS

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